Low Power 1-Bit ADC Array with Serial Output
Status: Completed
Start Date: 2010-01-29
End Date: 2010-07-29
Description: Microwave interferometers for NASA missions such as PATH and SCLP consist of up to 900 receivers. Each receiver requires I and Q ADCs (analog-to-digital converters) for signal digitizing at >200MHz before further digital processing in the cross-correlators. Power dissipation as well as instrument volume and weight are the most important parameters in space born instruments. Pacific Microchip proposes designing a monolithic array consisting of 20x1-bit ADCs. A serializer will be integrated to reduce the number of outputs from 20 to 1. This will reduce the power per ADC and resolve the problem of wiring congestion where the cross-correlators interface. For further power reduction, Pacific Microchip proposes integrating a novel metastability programming feature into the ADC latches. The clock distribution will also be dramatically simplified. The 2-wire serial I²C (Inter-Integrated Circuit) interface will allow all 1800 ADCs to be calibrated and optimized. Phase I work will provide a complete definition, in silico validation of the product, and a hardware proof of concept. The Phase II program will produce a fieldable product. In order to facilitate the commercialization efforts in Phase III, a low cost commercial radiation-tolerant SiGe HTB technology will be used to fabricate the product.
Benefits: The unique characteristics of the proposed ADC array makes it ideal for parallel digitizing applications that require extra low power at a relatively high quantization rate. Oversampling can be used in those cases when a higher resolution of more than one effective number of bits is required. Such ADCs are critical components in multichannel wireless communication systems. Advanced medical electronics require low power ADC arrays for their neural implants. ADC arrays are also required in image sensors and sensor networks still in their design phase. That the ADC array can be implemented using commercial SiGe technology makes it a particularly cost efficient solution. Since we plan to offer the block as an IP, it will fit for integration together with other blocks (both analog and digital) in the system, making the ADC array a cost efficient choice for SoCs.
The extra low power ADC arrays with serial outputs featuring power optimization capability depending on the required BER, high quantization frequencies, and convenient control through a two wire interface can be used in many radiometer and interferometer instruments applying passive and active microwave technologies that are under development by NASA in its mission to provide inexpensive data for science, agriculture, geology, weather forecast, climatology, and civil aviation. The potential application of the ADC arrays in space based wireless communication systems promise to lower the cost of exploration data delivery to the users.
The extra low power ADC arrays with serial outputs featuring power optimization capability depending on the required BER, high quantization frequencies, and convenient control through a two wire interface can be used in many radiometer and interferometer instruments applying passive and active microwave technologies that are under development by NASA in its mission to provide inexpensive data for science, agriculture, geology, weather forecast, climatology, and civil aviation. The potential application of the ADC arrays in space based wireless communication systems promise to lower the cost of exploration data delivery to the users.
Lead Organization: Pacific Microchip Corporation